CYD04S72V Overview
The FLEx72 family includes 4-Mbit, 9-Mbit and 18-Mbit pipelined, synchronous, true dual-port static RAMs that are high-speed, low-power 3.3V CMOS. Two ports are provided, permitting independent, simultaneous access to any location in memory. The result of writing to the same location by more than one port at the same time is undefined.
CYD04S72V Key Features
- True dual-ported memory cells that allow simultaneous access of the same memory location
- Synchronous pipelined operation
- Family of 4-Mbit, 9-Mbit and 18-Mbit devices
- Pipelined output mode allows fast operation
- 0.18-micron CMOS for optimum speed and power
- High-speed clock to data access
- 3.3V low power
- Active as low as 225 mA (typ)
- Standby as low as 55 mA (typ) Mailbox function for message passing Global master reset Separate byte enables on both por
- Internal mask register controls counter wrap-around