CYV15G0104TRB Datasheet | Cypress

Independent Clock HOTLink II™ Serializer and Reclocking Deserializer Features Functional Description - Second-generation HOTLink® technology - pliant to SMPTE 292M and SMPTE 259M video standards - Single channel video serializer plus single channel video reclocking deserializer - 195- to 1500-Mbps serial data signaling rate - Simultaneous operation at different signaling rates - Supports reception of either 1.485 or 1.485/1.001 Gbps data rate with the same training clock - Internal phase-locked loops (PLLs) with no external PLL ponents - Supports half-rate and full-rate clocking - Selectable differential PECL-patible serial inputs - Internal DC-restoration - Redundant differential PECL-patible serial outputs - No external bias resistors required - Internal source termination - Signaling-rate controlled edge-rates - Synchronous LVTTL parallel interface - JTAG boundary scan - Built-In Self-Test (BIST) for at-speed link testing - Link quality indicator - Analog signal detect - Digital signal detect - Low-power 1.8 W at 3.3 V typical - Single 3.3 V supply - Thermally enhanced BGA - Pb-free package option available - 0.25  Bi CMOS technology The CYV15G0104TRB Independent Clock HOTLink II™ Serializer and Reclocking Deserializer is a point-to-point or point-to-multipoint munications building block enabling transfer of data over a variety of high-speed serial links including SMPTE 292M and SMPTE 259M video applications. It supports signaling rates in the range of 195 to 1500 Mbps per serial link. The transmit and receive channels are independent and can operate simultaneously at different rates. The transmit channel accepts 10-bit parallel characters in an Input Register and converts them to serial data. The receive channel accepts serial data and converts it to 10-bit parallel characters and presents these characters to an Output Register. The received serial data can also be reclocked and retransmitted through the reclocker serial...