Download MB96F326 Datasheet PDF
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MB96F326 Description

0.18m CMOS F2MC-16FX CPU Up to 56 MHz internal, 17.8 ns instruction cycle time Optimized instruction set for controller applications (bit, byte, word and long-word data types; 23 different addressing modes; variety of pointers) 8-byte instruction execution queue Signed multiply (16-bit  16-bit) and divide (32-bit/16-bit) instructions available On-chip PLL clock multiplier (x1 - x25, x1 when PLL stop) 3 MHz - 16...

MB96F326 Key Features

  • 0.18m CMOS
  • F2MC-16FX CPU
  • Up to 56 MHz internal, 17.8 ns instruction cycle time
  • Optimized instruction set for controller