MB9A110K Datasheet | Cypress

MB9A110K Series 32-bit ARM® Cortex®-M3 FM3 Microcontroller The MB9A110K Series are a highly integrated 32-bit microcontrollers dedicated for embedded controllers with high-performance and low cost. These series are based on the ARM® Cortex®-M3 Processor with on-chip Flash memory and SRAM, and has peripheral functions such as Motor Control Timers, ADCs and munication Interfaces (UART, CSIO, I2C, LIN). The products which are described in this datasheet are placed into TYPE5 product categories in "FM3 Family Peripheral Manual". Features 32-bit ARM® Cortex®-M3 Core - Processor version: r2p1 - Up to 40 MHz Frequency Operation - Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels - 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] This Series are based on two independent on-chip Flash memories. - Main Flash  Up to 128 KB  Read cycle: 0 wait-cycle  Security function for code protection - Work Flash  32 KB  Read cycle: 0 wait-cycle  Security function is shared with code protection [SRAM] This Series contain a total of up to 16 KB on-chip SRAM. This is posed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex M3 core. SRAM1 is connected to System bus. - SRAM0: 8 KB - SRAM1: 8 KB Multi-function Serial Interface (Max 4 channels) - 2 channels with 16-steps × 9-bits FIFO (ch.0, ch.1), 2 channels without FIFO (ch.3, ch.5) - Operation mode is selectable from the followings for each channel. (In ch.5, only UART and LIN are available.)  UART  CSIO  LIN  I2C [UART] - Full-duplex double buffer - Selection with or without parity supported - Built-in dedicated baud rate generator - External clock available as a serial clock - Hardware Flow control: Automatically control the transmission by CTS/RTS (only ch.4) - Various error detect functions available (parity errors, framing errors, and overrun...