MB9B120J Datasheet | Cypress

MB9B120J Series 32-bit ARM® Cortex®-M3 FM3 Microcontroller The MB9B120J Series are highly integrated 32-bit microcontrollers dedicated for embedded controllers with low-power consumption mode and petitive cost. These series are based on the ARM® Cortex®-M3 Processor with on-chip Flash memory and SRAM, and have peripheral functions such as various timers, ADCs and munication Interfaces (UART, CSIO, I2C, LIN). The products which are described in this data sheet are placed into TYPE10 product categories in FM3 Family Peripheral Manual. Features 32-bit ARM® Cortex®-M3 Core - Processor version: r2p1 - Up to 72 MHz Frequency Operation - Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels - 24-bit System timer (Sys Tick): System timer for OS task management On-chip Memories [Flash memory] - 64 Kbytes - Read cycle: 0 wait-cycle - Security function for code protection [SRAM] This Series on-chip SRAM is posed of two independent SRAM (SRAM0, SRAM1). SRAM0 is connected to I-code bus and D-code bus of Cortex-M3 core. SRAM1 is connected to System bus. - SRAM0: 4 Kbytes - SRAM1: 4 Kbytes Multi-function Serial Interface (Max four channels) - 2 channels with 16steps×9-bit FIFO (ch.0/ch.1), 2 channels without FIFO (ch.2/ ch.5) - Operation mode is selectable from the followings for each channel.  UART  CSIO  LIN  I2C [UART] - Full-duplex double buffer - Selection with or without parity supported - Built-in dedicated baud rate generator - External clock available as a serial clock - Various error detection functions available (parity errors, framing errors, and overrun...