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PAL22V10 Datasheet Reprogrammable CMOS Pal Device

Manufacturer: Cypress (now Infineon)

Overview: 1P AL C2 2V 10 This is an abbreviated datasheet. Contact a Cypress representative for plete specifications. For new designs, please refer to the PALCE22V10.

General Description

The Cypress PALC22V10 is a CMOS second-generation programmable logic array device.

It is implemented with the familiar sum-of-products (AND-OR) logic structure and a new concept, the “programmable macrocell.” Logic Block Diagram (PDIP/CDIP) VSS 12 I 11 I 10 I 9 I 8 I 7 I 6 I 5 I 4 I 3 I 2 CP/I 1 PROGRAMMABLE AND ARRAY (132 X 44) 8 10 12 14 16 16 14 12 10 8 Reset Macrocell Macrocell Macrocell Macrocell Macrocell Macrocell Macrocell Macrocell Macrocell Macrocell Preset 13 I 14 I/O9 15 I/O8 16 I/O 7 17 I/O6 18 I/O5 19 I/O4 20 I/O3 21 I/O 2 22 I/O1 23 I/O0 24 VCC V10–1 Pin Configuration LCC/PLCC Top View 4 3 2 1 282726 I I I NC I I I 5 6 7 8 9 10 11 12131415161718 25 24 23 22 21 20 19 I/O 2 I/O 3 I/O 4 NC I/O 5 I/O 6 I/O 7 V10–2 PAL is a registered trademark of Advanced Micro Devices.

Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600 June 1986 – Revised September 1995 PALC22V10 Functional Description (continued) The PALC22V10 is available in 24-pin 300-mil molded DIPs, 300-mil windowed cerDIPs, 28-lead square ceramic leadless chip carriers, 28-lead square

Key Features

  • Advanced second-generation PAL architecture.
  • Low power.
  • 55 mA max. “L”.
  • 90 mA max. standard.
  • 120 mA max. military.
  • CMOS EPROM technology for reprogrammability.
  • Variable product terms.
  • 2 x (8 through 16) product terms.
  • User-programmable macrocell.
  • Output polarity control.
  • Individually selectable for registered or combinatorial operation.
  • 20, 25, 35 ns commerci.

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