PALC22V10D
Overview
- DIP , LCC, and PLCC available Ċ 7.5 ns commercial version 5 ns tCO 5 ns tS 7.5 ns tPD 133ĆMHz state machine Ċ 10 ns military and industrial verĆ sions 6 ns tCO 6 ns tS 10 ns tPD 110ĆMHz state machine Ċ 15Ćns commercial and military versions Ċ 25Ćns commercial and military versions
- High reliability Ċ Proven Flash EPROM technology Ċ 100% programming and functional testing *
- D Advanced secondĆgeneration PAL arĆ chitecture Low power Ċ 90 mA max. commercial (10 ns) Ċ 130 mA max. commercial (7.5 ns) CMOS Flash EPROM technology for electrical erasability and reprogramĆ mability Variable product terms Ċ 2 xĂ(8 through ā16) product terms UserĆprogrammable macrocell Ċ Output polarity control Ċ Individually selectable for regisĆ tered or combinatorial operation Functional Description The Cypress P ALC22V10D is a CMOS Flash Erasable secondĆgeneration proĆ grammable array logic device. It is imĆ plemented with the familiar sumĆofĆproĆ ducts (ANDĆOR) logic structure and the programmable macrocell. The P ALC22V10D is executed in a 24Ćpin 300Ćmil molded DIP , a 300Ćmil cerDIP , a 28Ćlead square ceramic leadless chip carriĆ er, a 28Ćlead square plastic leaded chip carĆ rier, and provides up to 22 inputs and 10 outputs. The 22V10D can be electrically
- Up to 22 input terms and 10 outputs Logic Block Diagram (PDIP/CDIP)
