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S26KL512S - high-speed CMOS MirrorBit NOR flash devices

General Description

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Key Features

  • 3.0V I/O, 11 bus signals.
  • Single ended clock.
  • 1.8V I/O, 12 bus signals.
  • Differential clock (CK, CK#).
  • Chip Select (CS#).
  • 8-bit data bus (DQ[7:0]).
  • Read-Write Data Strobe (RWDS).
  • HyperFlash™ memories use RWDS only as a Read Data Strobe.
  • Up to 333 MBps sustained read throughput.
  • DDR.
  • two data transfers per clock.
  • 166-MHz clock rate (333 MBps) at 1.8V VCC.
  • 100-MHz clock rate (200 MBps) at 3.0V VCC.
  • 96-ns initial random read.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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S26KL512S/S26KS512S S26KL256S/S26KS256S S26KL128S/S26KS128S 512 Mb (64 MB)/256 Mb (32 MB)/ 128 Mb (16 MB), 1.8V/3.0V HyperFlash™ Family Features ■ 3.0V I/O, 11 bus signals ❐ Single ended clock ■ 1.8V I/O, 12 bus signals ❐ Differential clock (CK, CK#) ■ Chip Select (CS#) ■ 8-bit data bus (DQ[7:0]) ■ Read-Write Data Strobe (RWDS) ❐ HyperFlash™ memories use RWDS only as a Read Data Strobe ■ Up to 333 MBps sustained read throughput ■ DDR – two data transfers per clock ■ 166-MHz clock rate (333 MBps) at 1.8V VCC ■ 100-MHz clock rate (200 MBps) at 3.