S6E1C32C0A Overview
32-bit ARM Cortex-M0+ Core Processor version: r0p1 Maximum operating frequency: 40.8 MHz Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 24 peripheral interrupt with 4 selectable interrupt priority levels 24-bit System timer (Sys Tick): System timer for OS task management Bit Band Operation patible with Cortex-M3 bit band operation. On-Chip Memory Flash memory Up to 128 Kbytes Read cycle: 0 wait-cycle Security function for code protection SRAM The on-chip SRAM of this series has one independent SRAM . Up to 16 Kbytes 4Kbytes: can retain value in Deep standby Mode USB Interface USB interface is posed of Device and Host With Main PLL, USB clock can be generated by multiplication of Main clock. USB Device USB 2.0 Full-Speed supported Max 6 EndPoint supported
S6E1C32C0A Key Features
- EndPoint 0 is control transfer
- EndPoint 1, 2 can be selected Bulk-transfer
- EndPoint 3 to 5 can select Bulk-transfer or
- EndPoint 1 to 5 prise Double Buffer
- The size of each EndPoint is according to the follows
- EndPoint 0, 2 to 5 : 64 bytes
- EndPoint 1 : 256 bytes
- USB host USB 2.0 Full/Low-Speed supported
- The operation mode of each channel can be selected from one of the following. UART CSIO (CSIO is known to many custo
- UART Full duplex double buffer Parity can be enabled or disabled. Built-in dedicated baud rate generator Externa