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SC680E - SMBus System Clock Buffer

General Description

The SC680 is a high fanout system clock buffer.

Its primary application is to create the large quantity of clocks needed to support a wide range of applications that requires those clock loads signal that are referenced to a single existing clock.

Loads of up to 30 pF are supported.

Key Features

  • 18 output buffer for high clock fanout.

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Other Datasheets by Cypress (now Infineon)

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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APPROVED PRODUCT SC680E SMBus System Clock Buffer Product Features § § § § § § § 18 output buffer for high clock fanout applications Each output can be internally disabled for EMI reduction VDD=3.3 volts for chip Vdd Output frequency range 10 Mhz to 100 Mhz < 250ps skew between output clocks 48-pin SSOP package Single Clock Enable pin for testability Product Description The SC680 is a high fanout system clock buffer. Its primary application is to create the large quantity of clocks needed to support a wide range of applications that requires those clock loads signal that are referenced to a single existing clock. Loads of up to 30 pF are supported.