W132 Overview
Reference Input: Output signals Q0:9 will be synchronized to this signal. Feedback Input: This input must be fed by one of the outputs (typically FBOUT) to ensure proper functionality. If the trace between FBIN and FBOUT is equal in length to the traces between the outputs and the signal destinations, then the signals received at the destinations will be synchronized to the CLK signal input. Integrated Series Resistor Outputs: The frequency and phase of the signals provided by these pins will be equal to the reference signal if properly laid out. Each output has a 25Ω series damping resistor integrated. Integrated Series Resistor Output: The frequency and phase of the signal provided by this pin will be equal to the reference signal if properly laid out. This output has a 25Ω series damping resistor integrated. Feedback Output: This output has a 25Ω series resistor integrated on chip....
W132 Key Features
- Spread Aware™-designed to work with SSFTG reference signals
- Well suited to both 100- and 133-MHz designs
- Ten (-09B) or Eleven (-10B) LVCMOS/LVTTL outputs
- Single output enable pin for -10 version, dual pins on -09 devices allow shutting down a portion of the outputs
- 3.3V power supply
- On board 25Ω damping resistors
- Available in 24-pin TSSOP package
- 3.3V±10% Operating Range
- 25 MHz < fOUT < 140 MHz Cycle-to-Cycle Jitter
- <150 ps Output to Output Skew