W133 Overview
PRELIMINARY W133 Spread Spectrum System Frequency Synthesizer Supply Voltages: ...................................... VDDQ3 = 3.3V±5% VDDQ2 = 2.5V±5% Note: 1. See Table 2 for plete mode selection details. Block Diagram X1 X2 CPU_STOP# Pin Configuration
W133 Key Features
- 250 ps CPUdiv2 Output Jitter
- 250 ps 48 MHz, 3V66, PCI, IOAPIC Output Jitter
- 500 ps CPU0:3, CPUdiv2_ 0:1 Output Skew
- 175 ps PCI_F, PCI1:7 Output Skew
- 500 ps 3V66_0:3, IOAPIC0:2 Output Skew
- 250 ps CPU to 3V66 Output Offset
- 0.0-1.5 ns (CPU leads) 3V66 to PCI Output Offset
- 1.5-4.0 ns (3V66 leads) CPU to IOAPIC Output Offset
- VDDQ3 = 3.3V±5% VDDQ2 = 2.5V±5%