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W147 - Frequency Generator

General Description

Reference Clock: 3.3V 14.318-MHz clock output.

This pin doubles as the select strap for APIC clock frequency.

If strapped LOW during power up, APIC clock runs at half PCI clock speed.

Key Features

  • Maximized EMI suppression using Cypress’s Spread Spectrum Technology.
  • Low jitter and tightly controlled clock skew.
  • Highly integrated device providing clocks required for CPU, core logic, and SDRAM.
  • Three copies of CPU clock at 66/100 MHz.
  • Nine copies of 100-MHz SDRAM clocks.
  • Eight copies of PCI clock.
  • Two copies of synchronous APIC clock.
  • Two copies of 48-MHz clock (non-spread spectrum) optimized for USB reference input an.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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PRELIMINARY W147G Frequency Generator for Integrated Core Logic Features • Maximized EMI suppression using Cypress’s Spread Spectrum Technology • Low jitter and tightly controlled clock skew • Highly integrated device providing clocks required for CPU, core logic, and SDRAM • Three copies of CPU clock at 66/100 MHz • Nine copies of 100-MHz SDRAM clocks • Eight copies of PCI clock • Two copies of synchronous APIC clock • Two copies of 48-MHz clock (non-spread spectrum) optimized for USB reference input and video dot clock • Two copies of 66-MHz fixed clock • One copy of 14.31818-MHz reference clock • Power-down control • I2C interface for turning off unused clocks Key Specifications CPU, SDRAM Outputs Cycle-to-Cycle Jitter: ..............