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CY7C1372CV25 Datasheet 512k X 36/1m X 18 Pipelined Sram With Nobl Architecture

Manufacturer: Cypress (now Infineon)

Overview: CY7C1370CV25 CY7C1372CV25 512K x 36/1M x 18 Pipelined SRAM with NoBL™.

General Description

The CY7C1370CV25 and CY7C1372CV25 are 2.5V, 512K x 36 and 1M x 18 Synchronous pipelined burst SRAMs with No Bus Latency™ (NoBL) logic, respectively.

They are designed to support unlimited true back-to-back Read/Write operations with no wait states.

The CY7C1370CV25 and CY7C1372CV25 are equipped with the advanced (NoBL) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle.

Key Features

  • Pin-compatible and functionally equivalent to ZBT™.
  • Supports 250-MHz bus operations with zero wait states.
  • Available speed grades are 250, 225, 200 and 167 MHz.
  • Internally self-timed output buffer control to eliminate the need to use asynchronous OE.
  • Fully registered (inputs and outputs) for pipelined operation.
  • Byte Write capability.
  • Single 2.5V power supply.
  • Fast clock-to-output times.
  • 2.6 ns (for 250-MHz device).

CY7C1372CV25 Distributor & Price

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More Datasheets from Cypress (now Infineon)

Part Number Description
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CY7C1370CV25 512K x 36/1M x 18 Pipelined SRAM with NoBL Architecture
CY7C1370D 18-Mbit (512 K 횞 36/1 M 횞 18) Pipelined SRAM
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CY7C1373C 18-Mbit (512K x 36/1M x 18) Flow-Through SRAM with NoBL Architecture
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