CYUSB3012 Overview
For a plete list of related documentation, click here. Cypress Semiconductor Corporation 198 Champion Court Document Number: X San Jose, CA 95134-1709 408-943-2600 Revised December 17, 2018 Logic Block Diagram CYUSB301X/CYUSB201X Document Number:.
CYUSB3012 Key Features
- Universal serial bus (USB) integration
- USB 3.1, Gen 1 and USB 2.0 peripherals pliant with USB 3.1 Specification Revision 1.0 (TID # 340800007)
- 5-Gbps SuperSpeed PHY pliant with USB 3.1 Gen 1
- High-speed On-The-Go (HS-OTG) host and peripheral pliant with OTG Supplement Version 2.0
- Thirty-two physical endpoints
- General Programmable Interface (GPIF™ II)
- Programmable 100-MHz GPIF II enables connectivity to a wide range of external devices
- 8-, 16-, 24-, and 32-bit data bus
- Up to16 configurable control signals
- Fully accessible 32-bit CPU
CYUSB3012 Applications
- SuperSpeed Explorer Board available for rapid prototyping ❐ Several accessory boards also available
- Adapter boards for Xilinx/Altera FPGA development
- Adapter board for Video development
- CPLD board for concept testing and initial development
