MB90548G Datasheet | Cypress

features are on-board CAN Interfaces (MB90540G series: 2 channels, MB90545G series: 1 channel) , which conform to CAN V2.0A and V2.0B specifications, supporting very flexible message buffer scheme and so offering more functions than a normal full CAN approach. The instruction set by F2MC-16LX CPU core inherits an AT architecture of the F2MCfamily with additional instruction sets for high-level languages, extended addressing mode, enhanced multiplication/division instructions, and enhanced bit manipulation instructions.The micro controller has a 32-bit accumulator for processing long word data.The MB90540G/545G series has peripheral resources of 8/10-bit A/D converters, UART (SCI) , extended I/O serial interfaces, 8/16-bit timer, I/O timer (input capture (ICU) , output pare (OCU) ) . Features - Clock Embedded PLL clock multiplication circuit Operating clock (PLL clock) can be selected from : dividedby-2 of oscillation or one to four times the oscillation Minimum instruction execution...