SHM35920-L Datasheet PDF (System Hardware Manager)

SHM35920-L - System Hardware Manager

Description

SHM 35-Series is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex®-M0 CPU.

It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing.

Features

32-bit MCU Subsystem.
48 MHz ARM Cortex-M0 CPU with single-cycle multiply.
Up to 256 kB of flash with Read Accelerator.
Up to 32 kB of SRAM.
DMA engine with 32 channels Programmable Analog.
Four opamps that operate in Deep Sleep mode at very low current levels.
All opamps have reconfigurable high current pin-drive, high-bandwidth internal drive, ADC input buffering, and Comparator modes with flexible connectivity allowing input connections to any pin.
Four curr.

Datasheet Details

Part number	SHM35920-L
Manufacturer	Cypress
File Size	3.28 MB
Description	System Hardware Manager
Datasheet	SHM35920-L Datasheet
Additional preview pages of the SHM35920-L datasheet.

📁 Similar Datasheet

SHM30 - High Voltage Rectifier (SSDI)

SHM30F - HIGH VOLTAGE RECTIFIER (SSDI)

SHM30FSMS - High Voltage Rectifier (SSDI)

SHM30SMS - High Voltage Rectifier (SSDI)

SHM30UF - HIGH VOLTAGE RECTIFIER (SSDI)

SHM30UFSMS - HIGH VOLTAGE RECTIFIER (SSDI)

SHM-12 - 12-Bit Linear Monolithic Sample-Hold Amplifiers (DATEL)

SHM-14 - 14-Bit Linear Sample-Hold Amplifier (DATEL)

SHM-43 - 0.01% Hybrid Sample/Hold (Datel)

SHM-4860 - High-Speed Sample-Hold Amplifiers (Datel)

Full PDF Text Transcription

Click to expand full text

SHM 35-Series: SHM35920-L Family Datasheet System Hardware Manager (SHM) General Description SHM 35-Series is a scalable and reconfigurable platform architecture for a family of programmable embedded system controllers with an ARM® Cortex®-M0 CPU. It combines programmable and reconfigurable analog and digital blocks with flexible automatic routing. The SHM 35920-L product family, based on this platform, is a combination of a microcontroller with digital programmable logic, programmable analog, programmable interconnect, secure expansion of memory off-chip, high-performance analog-to-digital conversion, opamps with Comparator mode, and standard communication and timing peripherals. The programmable analog and digital subsystems allow flexibility and in-field tuning of the design.

Published: May 16, 2025 |