CY8C9520A
Key Features
- Extendable soft addressing algorithm allowing flexible I2C
- Internal 3-/11-/27-Kbyte EEPROM
- User default storage, I/O port settings in internal EEPROM
- Optional EEPROM write disable (WD) input
- Interrupt output indicates input pin level changes and pulse width modulator (PWM) state changes
- Internal power on reset (POR)
- Internal configurable watchdog timer
- Details include trigger conditions, devices affected, and proposed workaround
- 198 Champion Court Document Number: 38-12036 Rev. *I
- San Jose, CA 95134-1709
