DAPU INS6104A
The INS6104A is a low skew, single input to four output clock buffer. The input clock is distributed to four LVCMOS outputs which can be enabled or disabled by OE pin. The INS6104A operates from a 3.3V/2.5V power supply.| Part No. | INS6104A |
|---|---|
| Datasheet | INS6104A Download |
| Manufacturer | DAPU |
| Description | 1:4 Low Skew Clock Buffer |
| Buy | Stock & Price |
FEATURES
● Low skew outputs (50ps)● Low power CMOS technology
● Operating Voltages of 3.3V/2.5V ± 5%
● Output Enable pin tri-states outputs
● 3.6 V tolerant input clock
● Totally Lead-Free & Fully RoHS Compliant
● Halogen and Antimony Free. “Green” Device OE
● Industrial temperature range: -40°C to +85°C
● Packaged: 8-pin SOIC VDD Logic Control
APPLICATIONS
● Wireless BBU, RRU and Wired Communication● Servers, Computing, PCI Express (PCIe)
● Switches, Routers, Line Cards, Timing Cards BUF_IN FOR 数 驭 科 中 GND GENERAL DESCRIPTIONS OUTPUT1 OUTPUT2 OUTPUT3 OUTPUT4 Perfect for fanning out multiple clock outputs. Version：V1.1 DAPU Confidential Page： 1 / 11 000051 Version V1.0 V1.1 Table of Amendment Revised Content Draft First issued Add Tape and Reel information on last page. Revised Date 2022.01.05 2023.02.07 数 驭 科 中 FOR Version：V1.1 DAPU Confidential Page： 2 / 11 000051 Table of Contents 1
GENERAL DESCRIPTION
................................................................................................................4 2 FUNCTIONAL BLOCK DIAGRAM .........................................................................................
