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74LVC3G04 - TRIPLE INVERTER GATE

General Description

The 74LVC3G04 is a triple inverter gate with standard push-pull outputs.

The device is designed for operation with a power supply range of 1.65V to 5.5V.

The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment.

Key Features

  • Wide Supply Voltage Range from 1.65V to 5.5V.
  • ±24mA Output Drive at 3.3V.
  • CMOS Low-Power Consumption.
  • IOFF Supports Partial Power Down Mode Operation.
  • Inputs Accept up to 5.5V.
  • ESD Protection Tested per JESD 22 Exceeds 2000V Human Body Model (A114) Exceeds 1000V Charged Device Model (C101).
  • Latch-Up Exceeds 100mA per JESD 78, Class I.
  • Range of Package Options.
  • Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2).
  • Halogen and Antimony Free. “Gr.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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Description Pin Assignments The 74LVC3G04 is a triple inverter gate with standard push-pull outputs. The device is designed for operation with a power supply range of 1.65V to 5.5V. The inputs are tolerant to 5.5V allowing this device to be used in a mixed voltage environment. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. Each of the inverters performs the positive Boolean function: YA 74LVC3G04 TRIPLE INVERTER GATE Features  Wide Supply Voltage Range from 1.65V to 5.5V  ±24mA Output Drive at 3.3V  CMOS Low-Power Consumption  IOFF Supports Partial Power Down Mode Operation  Inputs Accept up to 5.