KWPAN1200 Description
23-bit input host address bus. 16-bit bidirectional data bus. Chip Select 1, active-low Chip Select 2, active-low Output Enable, active-low IREQ signal, active-low Write Enable, active-low Indicate Atrribute Memory Access, active-low Wait signal, active-low General-purpose I/O System reset, active-low System reset, active-high Transmitter output to External UART transceiver.