DS21348
FEATURES plete E1, T1, or J1 Line Interface Unit (LIU) Supports Both Long-Haul And Short-Haul Trunks Internal Software-Selectable Receive-Side Termination for 75Ω/100Ω/120Ω 3.3V Power Supply 32-Bit or 128-Bit Crystal-Less Jitter Attenuator Requires Only a 2.048MHz Master Clock for Both E1 and T1 with Option to Use 1.544MHz for T1 Generates the Appropriate Line Build-Outs, with and without Return loss, for E1 and DSX-1 and CSU Line Build-Outs for T1 AMI, HDB3, and B8ZS, Encoding/Decoding 16.384MHz, 8.192MHz, 4.096MHz, or 2.048MHz Clock Output Synthesized to Recovered Clock Programmable Monitor Mode for Receiver Loopbacks and PRBS Pattern Generation/ Detection with Output for Received Errors Generates/Detects In-Band Loop Codes, 1 to 16 Bits Including CSU Loop Codes 8-Bit Parallel or Serial Interface with Optional Hardware Mode Muxed and Nonmuxed Parallel Bus Supports Intel or Motorola Detects/Generates Blue (AIS) Alarms NRZ/Bipolar Interface for Tx/Rx Data I/O Transmit Open-Circuit...
