| Part number | DS21372 |
|---|---|
| Datasheet | DS21372_DallasSemiconducotr.pdf |
| File Size | 214.73 KB |
| Manufacturer | Dallas Semiconducotr |
| Description | 3.3V Bit Error Rate Tester BERT |
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The DS21372 Bit Error Rate Tester (BERT) is a software programmable test pattern generator, receiver, and analyzer capable of meeting the most stringent error performance requirements of digital transmission facilities. Two categories of test pattern generation (Pseudo-random and Repetitive) conform to CCITT/ITU O.151, O.152, O.153, and O.161 standards. The DS21372 operates at clock rates ranging from DC to 20 MHz.
See all Dallas Semiconducotr datasheets
| Part Number | Description |
|---|---|
| DS21348 | 3.3V E1/T1/J1 Line Interface |
| DS21352 | 3.3V DS21352 and 5V DS21552 T1 Single-Chip Transceivers |
| DS21354 | MTTF is frequently used interchangeably with MTBF |
| DS2108 | Differential SCSI Switchable Terminator |
| DS2114 | SCSI Terminator |
| DS2118M | Ultra3 LVD/SE SCSI Terminator |
| DS2119M | Ultra3 LVD/SE SCSI Terminator |
| DS2120 | Ultra3 LVD SCSI Terminator |
| DS2129 | LVD SCSI 27-Line Regulator |
| DS2141A | T1 Controller |
