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DS1350Y - 4096k Nonvolatile SRAM

This page provides the datasheet information for the DS1350Y, a member of the DS1350AB 4096k Nonvolatile SRAM family.

Datasheet Summary

Description

A0 - A18 DQ0 - DQ7 CE WE OE RST BW VCC GND NC - Address Inputs - Data In/Data Out - Chip Enable - Write Enable - Output Enable - Reset Output - Battery Warning - Power (+5V) - Ground - No Connect DESCRIPTION The DS1350 4096k Nonvolatile SRAMs are 4,194,304-bit, fully static, nonvolatile SRAMs org

Features

  • 10 years minimum data retention in the absence of external power Data is automatically protected during power loss Power supply monitor resets processor when VCC power loss occurs and holds processor in reset during VCC ramp-up Battery monitor checks remaining capacity daily Read and write access times as fast as 70 ns Unlimited write cycle endurance Typical standby current 50 µA Upgrade for 512k x 8 SRAM, EEPROM or Flash Lithium battery is electrically disconnected to retain freshness until pow.

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Datasheet preview – DS1350Y

Datasheet Details

Part number DS1350Y
Manufacturer Dallas Semiconductor
File Size 256.01 KB
Description 4096k Nonvolatile SRAM
Datasheet download datasheet DS1350Y Datasheet
Additional preview pages of the DS1350Y datasheet.

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www.DataSheet4U.com DS1350Y/AB 4096k Nonvolatile SRAM with Battery Monitor www.dalsemi.
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