Data Delay Devices 3D3215
The 3D3215 5-Tap Delay Line product family consists of fixed-delay 3.3V CMOS integrated circuits. Each package contains a single delay line, tapped and buffered at 5 points spaced uniformly in time. The input is reproduced at the outputs without inversion, shifted in time as per the user-specified dash number.FEATURES
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● All-silicon, low-power 3.3V CMOS technology Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise Leading- and trailing-edge accuracy Delay range: 1.5ns through 300ns Total delay tolerance: 2% or 0.5ns (3.3V, 25C) Temperature stability: ±1% typical (0C-70C) Vdd stability: ±1% typical (3.0V-3.6V) Static Idd: 1.3ma typical Minimum input pulse width: 25% of total delay IN O2 O4 GND 1 2 3 4 8 7 6 5 data 3 ® delay devices, inc. PACKAGES VDD O1 O3 O5 IN O2 O4 GND 1 2 3 4 8 7 6 5 VDD O1 O3 O5 3D3215Z-xx SOIC (150 Mil) 3D3215M-xx DIP (300 Mil) For mechanical dimensions, click here. For package marking details, click here. FUNCTIONAL
DESCRIPTION
Tap-totap (incremental) delay values can range from 1.5ns through 60ns. The 3D3215 is 3.3V CMOScompatible and features both rising- and falling-edge accuracy. PIN DESCRIPTIONS IN O1 O2 O3 O4 O5 VDD GND N/C Delay Line Input Tap 1 Output (20%) Tap 2 Output (40%) Tap 3 Output (60%) Tap 4 Outpu...