3D7324 Datasheet | Data Delay Devices

MONOLITHIC QUADRUPLE FIXED DELAY LINE (SERIES 3D7324) Features - - - - - - - - - - - - All-silicon, low-power CMOS technology TTL/CMOS patible inputs and outputs Vapor phase, IR and wave solderable Auto-insertable (DIP pkg.) Low ground bounce noise Leading- and trailing-edge accuracy Delay range: 6 through 6000ns Delay tolerance: 2% or 1.0ns Temperature stability: ±3% typ (-40C to 85C) Vdd stability: ±1% typical (4.75V to 5.25V) Minimum input pulse width: 20% of total delay 14-pin Gull-Wing available as drop-in replacement for hybrid delay lines I1 N/C I2 I3 I4 N/C GND 1 2 3 4 5 6 7 PACKAGES 14 13 12 11 10 9 8 VDD N/C O1 N/C O2 O3 O4 I1 N/C I2 I3 I4 N/C GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD N/C O1 N/C O2 O3 O4 3D7324-xx DIP 3D7324G-xx Gull-Wing 3D7324D-xx SOIC (150 Mil) For mechanical dimensions, click here. For package marking details, click here. FUNCTIONAL DESCRIPTION The 3D7324 Quadruple Delay Line product family consists of fixeddelay CMOS integrated circuits. Each package contains four matched, independent delay lines. Delay values can range from 6ns through 6000ns. The input is reproduced at the output without inversion, shifted in time as per the user-specified dash number. The 3D7324 is TTL- and CMOS-patible, capable of driving ten 74LS-type loads, and Features both rising- and falling-edge accuracy. The all-CMOS 3D7324 integrated circuit has been designed as a reliable, economic alternative to hybrid TTL fixed delay lines. It is offered in a standard 14-pin auto-insertable DIP and a space saving surface mount 14-pin SOIC. PIN DESCRIPTIONS I1 I2 I3 I4 O1 O2 O3 O4 VDD GND N/C Delay Line 1 Input Delay Line 2 Input Delay Line 3 Input Delay Line 4 Input Delay Line 1 Output Delay Line 2 Output Delay Line 3 Output Delay Line 4 Output +5 Volts Ground No Connection .. TABLE 1: PART NUMBER SPECIFICATIONS DIP-14 3D7324 -6 -8 -10 -15 -20 -25 -30 -40 -50 -100 -200 -500 -1000 -6000 PART NUMBER DIP-14 SOIC-14 3D7324G 3D7324D -6...