Datasheet4U Logo Datasheet4U.com

3D7424 - MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE

Description

The 3D7424 device is a small, versatile, quad 4-bit programmable monolithic delay line.

Delay values, programmed via the serial interface, can be independently varied over 15 equal steps.

The step size (in ns) is determined by the device dash number.

Features

  • Four indep’t programmable lines on a single chip All-silicon CMOS technology Low quiescent current (5mA typical) Leading- and trailing-edge accuracy Vapor phase, IR and wave solderable Increment range: 0.75ns through 400ns Delay tolerance: 3% or 2ns (see Table 1) Line-to-line matching: 1% or 1ns typical Temperature stability: ±1.5% typical (-40C to 85C) Vdd stability: ±0.5% typical (4.75.

📥 Download Datasheet

Datasheet preview – 3D7424

Datasheet Details

Part number 3D7424
Manufacturer Data Delay Devices
File Size 387.14 KB
Description MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE
Datasheet download datasheet 3D7424 Datasheet
Additional preview pages of the 3D7424 datasheet.

📁 Similar Datasheet

  • 3D7501 - MONOLITHIC MANCHESTER ENCODER (ETC)
  • 3D7503 - MONOLITHIC MANCHESTER ENCODER/DECODER (ETC)
Other Datasheets by Data Delay Devices
  • 3D7428 - MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE
  • 3D7408 - MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE
  • 3D7418 - MONOLITHIC 8-BIT PROGRAMMABLE DELAY LINE
  • 3D7444 - MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE
  • 3D7005 - All Silicon Delay Line
  • 3D7010 - MONOLITHIC 10-TAP FIXED DELAY LINE
  • 3D7010G - MONOLITHIC 10-TAP FIXED DELAY LINE
  • 3D7010S - MONOLITHIC 10-TAP FIXED DELAY LINE

Full PDF Text Transcription

Click to expand full text
3D7424 MONOLITHIC QUAD 4-BIT PROGRAMMABLE DELAY LINE (SERIES 3D7424) FEATURES • • • • • • • • • • • Four indep’t programmable lines on a single chip All-silicon CMOS technology Low quiescent current (5mA typical) Leading- and trailing-edge accuracy Vapor phase, IR and wave solderable Increment range: 0.75ns through 400ns Delay tolerance: 3% or 2ns (see Table 1) Line-to-line matching: 1% or 1ns typical Temperature stability: ±1.5% typical (-40C to 85C) Vdd stability: ±0.5% typical (4.75V to 5.25V) Minimum input pulse width: 10% of total delay I1 SC I2 I3 I4 SI GND 1 2 3 4 5 6 7 PACKAGES 14 13 12 11 10 9 8 VDD AL O1 SO O2 O3 O4 I1 SC I2 I3 I4 SI GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VDD AL O1 SO O2 O3 O4 DIP-14 3D7424-xx SOIC-14 3D7424D-xx For mechanical dimensions, click here.
Published: |