Data Delay Devices PDU14F
The PDU14F is a memory device. The timing restrictions are shown in Figure 1. This time is given by the following relation: TOAX = max { (Ai - A i-1) * TINC , 0 } where A i-1 and Ai are the old and new address codes, respectively.| Part No. | PDU14F |
|---|---|
| Datasheet | PDU14F Download |
| Manufacturer |  Data Delay Devices |
| Description | 4-BIT PROGRAMMABLE DELAY LINE |
| Buy | Stock & Price |
FEATURES
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● Digitally programmable in 16 delay steps Monotonic delay-versus-address variation Two separate outputs: inverting & non-inverting Precise and stable delays Input & outputs fully TTL interfaced & buffered 10 T2L fan-out capability Fits standard 24-pin DIP socket Auto-insertable OUT/ OUT EN/ GND N/C IN N/C GND N/C N/C EN/ GND 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 data 3 ® delay devices, inc. PACKAGES VCC A0 A1 A2 VCC N/C N/C N/C VCC A3 N/C N/C PDU14F-xx DIP PDU14F-xxA4 Gull-Wing PDU14F-xxB4 J-Lead PDU14F-xxM Military DIP PDU14F-xxMC4 Military Gull-Wing FUNCTIONAL
DESCRIPTION
The PDU14F-series device is a 4-bit digitally programmable delay line. The delay, TDA, from the input pin (IN) to the output pins (OUT, OUT/) depends on the address code (A3-A0) according to the following formula: TDA = TD0 + TINC * A PIN DESCRIPTIONS IN OUT OUT/ A0-A3 EN/ VCC GND Delay Line Input Non-inverted Output Inverted Output Address Bits Output Enable +5 Volts Ground where A is the address code, TINC is the incremental delay of the device, and TD0 is the inherent delay of the device.
