Data Image FG030565DSSWBG03
The shift direction of device internal shift register is controlled by 7 LRC I this Pin as shown below: LRC=”H”, left to right LRC=”L”, right to left 8 NC NO Connection 9 NC NO Connection 10 SPENA I Serial port Data Enable Signal.| Part No. | FG030565DSSWBG03 |
|---|---|
| Datasheet | FG030565DSSWBG03 Download |
| Manufacturer |  Data Image |
| Description | TFT Module |
| Buy | Stock & Price |
FEATURES
4. GENERAL SPECIFICATIONS 5.ABSOLUTE MAXIMUM RATINGS
6. BLOCK DIAGRAM 7. INPUT / OUTPUT TERMINALS 8.ELECTRICAL CHARACTERISTICS
9. SERIAL INTERFACE 10. COMMAND 11. GAMMA ADJUSTMENT FUNCTION 12. OPTICAL CHARACTERISTIC 13. APPLICATION CIRCUIT 14. QUALITY ASSURANCE 15. LOT NUMBERING SYSTEM 16. LCM NUMBERING SYSTEM 17. PRECAUTIONS IN USE LCM 18. OUTLINE DRAWING 19. PACKAGE INFORMATION Customer Companies R&D Dept. Q.C. Dept. 1 2 3 3 3 4 5 7 14 17 27 32 34 35 36 36 37 38 39 Eng. Dept. Prod. Dept. Approved by Version: A Issued Date: 2010/6/3 Sheet Code: Total Pages: 39 FG030565DSSWBG03 REV:A Page: 1 /39 HY-LINE Computer Components / 2.RECORD OF REVISION Confidential Document Rev Date Item Page Comment 1 31/OCT/07 8 8 10 2 19/DEC/07 10 10 18 8 3 21/May/08 9 10 A 3/Jun/10’ 7 8 17 21 26 38 8~13 14 24 Initial preliminary Modify: DCELECTRICAL CHARACTERISTICS
Modify: LED Dice Life Time Modify: Command Table Modify: Function Control (R05H) Modify: SPI Setting Code (R05H) Modify: OUTLINE D...
