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DP3ED32MX8RY5 Datasheet

Manufacturer: Dense-Pac Microsystems

This datasheet includes multiple variants, all published together in a single manufacturer document.

DP3ED32MX8RY5 datasheet preview

Datasheet Details

Part number DP3ED32MX8RY5
Datasheet DP3ED32MX8RY5 DP3ED32MX8RY5-Dense Datasheet (PDF)
File Size 110.86 KB
Manufacturer Dense-Pac Microsystems
Description 3.3V EDO DRAM
DP3ED32MX8RY5 page 2

DP3ED32MX8RY5 Overview

The M-Densus series is a family of interchangeable memory modules. The 64 Megabit DRAM is a member of this family which utilizes the new and innovative space saving TSOP stacking technology. The module is constructed with four 8 Meg x 8 EDO, 3.3 Volt DRAM’s available in a 128 Megabit patible pin-out.

DP3ED32MX8RY5 Key Features

  • Configurations Available
  • Access Times: 50, 60ns (max.)
  • 3.3 Volt Supply
  • mon Data Inputs and Outputs
  • Extended Data Out Capability (EDO)
  • 4K/8K 64ms Refresh
  • 3 Variations of Refresh
  • RAS only Refresh
  • CAS before RAS Refresh
  • Hidden Refresh
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