DP3ED32MX8RY5 Datasheet PDF (3.3V EDO DRAM) | Download Dense-Pac Microsystems DP3ED32MX8RY5

DP3ED32MX8RY5 - 3.3V EDO DRAM

This page provides the datasheet information for the DP3ED32MX8RY5, a member of the DP3ED32MX8RY5-Dense 3.3V EDO DRAM family.

Description

The M-Densus series is a family of interchangeable memory modules.

The 64 Megabit DRAM is a member of this family which utilizes the new and innovative space saving TSOP stacking technology.

Features

Configurations Available: 256 Megabit: 32 Meg x 8.
Access Times: 50, 60ns (max. ).
3.3 Volt Supply.
Common Data Inputs and Outputs.
Extended Data Out Capability (EDO).
4K/8K 64ms Refresh.
3 Variations of Refresh: - RAS only Refresh - CAS before RAS Refresh - Hidden Refresh.
Package: Leadless TSOP Module A0 - A11 A0 - A12.
DQ0 - DQ4 CAS0 - CAS4 RAS0 - RAS4 WE OE VCC VSS N. C. PIN NAMES Row Address: A0 - A11 Column Addre.

Datasheet Details

Part number	DP3ED32MX8RY5
Manufacturer	Dense-Pac Microsystems
File Size	110.86 KB
Description	3.3V EDO DRAM
Datasheet	DP3ED32MX8RY5 Datasheet
Additional preview pages of the DP3ED32MX8RY5 datasheet.

📁 Similar Datasheet

DP3 - Connector Interface (JAE)

DP302 - Silicon Beam-Lead Schottky Barrier Detector Diodes (Temex)

DP3090 - N-Channel MOSFET (Developer Microelectronics)

DP30D600T*1016xx - E2 IGBT (Danfoss Silicon Power GmbH)

DP30E600T*1016xx - E2 IGBT (Danfoss Silicon Power GmbH)

DP30F600T101626 - E2 IGBT (Danfoss Silicon Power GmbH)

DP30H600T101619 - E2 IGBT (Danfoss Silicon Power GmbH)

DP3100 - Mostly Applied Electromm unication Equipment Protect (Dongguang Micro-electronics)

DP3115 - 2.5A Monolithic Buck Converter (DEVELOPER MICROELECTRONICS)

DP3119 - 36V 2.1A Monolithic Step Down Switching Regulator (DEVELOPER MICROELECTRONICS)

Full PDF Text Transcription

Click to expand full text

M-Densus High Density Memory Device 256 Megabit CMOS 3.3V EDO DRAM DP3ED32MX8RY5 DESCRIPTION: The M-Densus series is a family of interchangeable memory modules. The 64 Megabit DRAM is a member of this family which utilizes the new and innovative space saving TSOP stacking technology. The module is constructed with four 8 Meg x 8 EDO, 3.3 Volt DRAM’s available in a 128 Megabit compatible pin-out. The 64 Megabit based M-Densus modules have been designed to fit in the same footprint as the 32 Meg x 4 DRAM TSOP monolithic. This allows the memory board designer to upgrade the memory in their products without redesigning the memory board, thus saving time and money. PIN-OUT DIAGRAM FEATURES: • Configurations Available: 256 Megabit: 32 Meg x 8 • Access Times: 50, 60ns (max.) • 3.

Published: Jan 8, 2025 |