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74AUP2G125 - DUAL 3-STATE BUFFER

General Description

The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

The 74AUP2G125 is a dual 3-State Buffer.

Key Features

  • Advanced Ultra Low Power (AUP) CMOS.
  • Supply Voltage Range from 0.8 V to 3.6 V.
  • ± 4 mA Output Drive at 3.0 V.
  • Low Static Power Consumption.
  • Icc < 0.9 uA.
  • Low Dynamic Power Consumption.
  • CPD = 6 pF Typical at 3.6 V.
  • Schmitt trigger action at all inputs make the circuit tolerant for slower input rise and fal.

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Other Datasheets by Diodes Incorporated

Part Number Description
74AUP2G126 DUAL 3-STATE BUFFER
74AUP2G14 DUAL SCHMITT TRIGGER INVERTERS
74AUP2G17 DUAL SCHMITT TRIGGER BUFFERS
74AUP2G00 DUAL NAND GATE
74AUP2G02 DUAL NOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NEW PRODUCT 74AUP2G125 DUAL 3-STATE BUFFER Description Pin Assignments The Advanced Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications. The 74AUP2G125 is a dual 3-State Buffer. Each buffer has an individual output enable pin while asserted HIGH will place the output in a high impedance state. The device is designed for operation over a power supply range of 0.8 V to 3.6 V. The device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output preventing damaging current backflow when the device is powered down. (Top View) X2-DFN1210-8 Features  Advanced Ultra Low Power (AUP) CMOS  Supply Voltage Range from 0.8 V to 3.6 V  ± 4 mA Output Drive at 3.