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MA31753 - DMA Controller (DMAC) For An MA31750 System

General Description

The MA31753 DMA controller has 4 channels from which independant transfers can be executed.

These channels have programmable priorities and can be masked.

They can also be enabled and disabled under software control.

Key Features

  • s Radiation Hard CMOS SOS Technology s Four Independant DMA Channels s MIL-STD-1750A or B Operation in an MA31750 System s Capable of Processor Independant Table Driven Operation s Memory to Memory, I/O to Memory, Memory to I/O and I/O to I/O Transfers Supported s Masking of Individual Channel DMA Requests s Simple MA31750 Bus Interface s Single Word, Double Word or Multi-Word Transfers for each of the DMA Channels s Cascade Interface Allows for Channel Expansion s Programmable Channel Priority.

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Datasheet Details

Part number MA31753
Manufacturer Dynex
File Size 243.67 KB
Description DMA Controller (DMAC) For An MA31750 System
Datasheet download datasheet MA31753 Datasheet

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MA31753 MA31753 DMA Controller (DMAC) For An MA31750 System Replaces June 1999 version, DS3825-4.0 DS3825-5.0 January 2000 The MA31753 Direct Memory Access Controller (DMAC) is a peripheral interface circuit design primarily for use with the MA31750 microprocessor. Each DMAC provides up to four independant, prioritised channels each of which can perform DMA transfers between memory and/or I/O devices using the MA31750 bus. Each channel has its own programmable internal priority and can be masked under program control. Further, individual channels have their own associated status and control words enabling an individual channel to be reprogrammed without disturbing transfers which may be taking place on other channels.