EN35QY512A Datasheet | Elite Semiconductor Microelectronics Technology

FEATURES - Single power supply operation - Full voltage range: 2.7-3.6 volt - Serial Interface Architecture - SPI patible: Mode 0 and Mode 3 - 512 M-bit Serial Flash - 512 M-bit / 65,536 KByte / 262,144 pages - 256 bytes per programmable page - Standard, Dual or Quad SPI - Standard SPI: CLK, CS#, DI, DO, WP#, HOLD# - Dual SPI: CLK, CS#, DQ0, DQ1, WP#, HOLD# - Quad SPI: CLK, CS#, DQ0, DQ1, DQ2, DQ3 - Configurable dummy cycle number - High performance - 2.7-3.6V - 104 MHz clock rate for Single/Dual/Quad I/O Fast Read - 133 MHz clock for Quad I/O Fast Read - Low power consumption - 14 m A typical active current - 2 A typical power down current - Uniform Sector Architecture - 16,384 sectors of 4-Kbyte - 2,048 blocks of 32-Kbyte - 1,024 blocks of 64-Kbyte - Any sector or block can be erased individually - Software and Hardware Write Protection - Write Protect all or portion of memory via software - Enable/Disable protection with WP# pin - High performance program/erase speed - Page program time: 0.5 ms typical - Sector erase time: 40 ms typical - Half Block erase time 200 ms typical - Block erase time 300 ms typical - Chip erase time: 120 seconds typical - 3byte address and 4byte address switch - Volatile Status Register Bits - Lockable 3x512 byte OTP security sector - Support Serial Flash Discoverable Parameters (SFDP) signature - Read Unique ID Number - Minimum 100K endurance...