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M12L64322A-7TG2S Datasheet 512k X 32 Bit X 4 Banks Synchronous Dram

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

Overview: ESMT SDRAM.

This datasheet includes multiple variants, all published together in a single manufacturer document.

General Description

The M12L64322A is 67,108,864 bits synchronous high data rate Dynamic RAM organized as 4 x 524,288 words by 32 bits.

Synchronous design allows precise cycle control with the

Key Features

  • JEDEC standard 3.3V power supply LVTTL compatible with multiplexed address Four banks operation MRS cycle with address key programs - CAS Latency ( 2 & 3 ) - Burst Length ( 1, 2, 4, 8 & full page ) - Burst Type ( Sequential & Interleave ) All inputs are sampled at the positive going edge of the system clock Burst Read Single-bit Write operation DQM for masking Auto & self refresh 64ms refresh period (4K cycle) M12L64322A (2S) 512K x 32 Bit x 4 Banks Synchronous DRAM.

M12L64322A-7TG2S Distributor