M13S128168A-5TG2S

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

M13S128168A-5TG2S datasheet by ESMT (Elite Semiconductor Microelectronics Technology).

This datasheet includes multiple variants, all published together in a single manufacturer document.

M13S128168A-5TG2S Datasheet Details

Part number	M13S128168A-5TG2S
Datasheet	M13S128168A-5TG2S M13S128168A Datasheet (PDF)
File Size	1.76 MB
Manufacturer	ESMT (Elite Semiconductor Microelectronics Technology)
Description	2M x 16 Bit x 4 Banks Double Data Rate SDRAM

Pin Name Function Pin Name Function A0~A1.

Double-data-rate architecture, two data transfers per clock cycle
Bi-directional data strobe (DQS)
Differential clock inputs (CLK and CLK )
DLL aligns DQ and DQS transition with CLK transition
Four bank operation
CAS Latency : 2, 2.5, 3
Burst Type : Sequential and Interleave
Burst Length : 2, 4, 8
All inputs except data & DM are sampled at the rising edge of the system clock (CLK)
Data I/O transitions on both edges of data strobe (DQS)

Part Number	Description
M13S128168A-5BG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5BG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5TG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4BG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4TG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6BG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-6TG2S	2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A	Double Data Rate SDRAM
M13S2561616A-4BG2T	4M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S2561616A-4TG2T	4M x 16 Bit x 4 Banks Double Data Rate SDRAM