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M13S128168A-6BG2S Datasheet

2m X 16 Bit X 4 Banks Double Data Rate Sdram

Manufacturer: ESMT (Elite Semiconductor Microelectronics Technology)

This datasheet includes multiple variants, all published together in a single manufacturer document.

M13S128168A-6BG2S Overview

Pin Name Function Pin Name Function A0~A1.

M13S128168A-6BG2S Key Features

  • Double-data-rate architecture, two data transfers per clock cycle
  • Bi-directional data strobe (DQS)
  • Differential clock inputs (CLK and CLK )
  • DLL aligns DQ and DQS transition with CLK transition
  • Four bank operation
  • CAS Latency : 2, 2.5, 3
  • Burst Type : Sequential and Interleave
  • Burst Length : 2, 4, 8
  • All inputs except data & DM are sampled at the rising edge of the system clock (CLK)
  • Data I/O transitions on both edges of data strobe (DQS)

More Datasheets from ESMT (Elite Semiconductor Microelectronics Technology)

See all ESMT (Elite Semiconductor Microelectronics Technology) datasheets

Part Number Description
M13S128168A-6TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4.5TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-4TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5BG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128168A-5TG2S 2M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S128324A Double Data Rate SDRAM
M13S2561616A-4BG2T 4M x 16 Bit x 4 Banks Double Data Rate SDRAM
M13S2561616A-4TG2T 4M x 16 Bit x 4 Banks Double Data Rate SDRAM

M13S128168A-6BG2S Distributor