AS4LC8M8S0 Datasheet 3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM

Manufacturer: Unknown Manufacturer

Overview: Advance information ® AS4LC8M8S0 AS4LC4M16S0 3.3V 4Mx16 and 8Mx8 CMOS synchronous.

AS4LC8M8S0 3.3v 4mx16 and 8mx8 cmos synchronous dram by Unknown Manufacturer - Datasheet Preview

Datasheet Details

Part number	AS4LC8M8S0
Manufacturer	Unknown Manufacturer
File Size	566.21 KB
Description	3.3V 4Mx16 and 8Mx8 CMOS synchronous DRAM
Download	AS4LC8M8S0 Download (PDF)

General Description

Output disable/write mask Address inputs Bank select inputs Input/output Row address strobe Column address strobe Write enable Chip select Power (3.3V ± 0.3V) Ground Clock input Clock enable AS4LC4M16S0 Selection guide Symbol Bus frequency Minimum clock access

Key Features

PC100/133 compliant.
Organization - 2,097,152 words × 8 bits × 4 banks (8M×8) - 1,048,576 words × 16 bits × 4 banks (4M×16).
Fully synchronous - All signals referenced to positive edge of clock.
Four internal banks controlled by BA0/BA1 (bank select).
High speed - 133/125/100 MHz - 5.4 ns (133 MHz)/6 ns (125/100 MHz) clock access time.
Low power consumption - Standby: 7.2 mW max, CMOS I/O.
4096 refresh cycles, 64 ms refresh interva.

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