CH342 Datasheet | Unknown Manufacturer

Features l Full-speed USB device interface, USB 2.0 patible. l Emulate standard UART interface, used to upgrade the original serial peripheral or expand additional UART via USB. l Original serial applications are totally patible without any modification in Windows operating systems. l Supports free installation OS which built-in CDC driver or multi-functional high-speed VCP vendor driver. l Hardware full duplex UART interface, integrated independent transmit-receive buffer, supports munication baud rate varies from 50bps to 3Mbps. l UART supports 5, 6, 7 or 8 data bits, supports odd, even, space, mark and none parity. l Supports mon MODEM interface signals RTS, DTR, DCD, DSR and CTS. l Supports CTS and RTS hardware automatic flow control. l Supports half-duplex, provides sending status TNOW, used for controlling RS485 to transmit-receive switch. l Supports RS232 interface, through external voltage conversion chip. l Supports 5V and 3.3V power supply voltages. l UART interface I/O powered independently, supports 5V, 3.3V, 2.5V, 1.8V power supply voltages. l Integrated power-on reset, integrated clock, no external crystal required. l Built-in EEPROM used to configure the chip of VID, PID, maximum current value, vendor and product information string, etc. l Integrated Unique ID (USB Serial Number). l Ro HS pliant QFN24, ESSOP10 lead-free package. 3. Packages CH342 Datasheet Package Width of Plastic QFN24_4X4 4- 4mm ESSOP-10 3.9mm 150mil Pitch of Pin 0.5mm 19.7mil 1.00mm 39mil Instruction of Package Square leadless 24-pin patch Narrow pitch 10-pin patch with bottom plate Ordering Information CH342F CH342K Note: The backplane of CH342F/CH342K is 0# pin GND, which is an optional but remended connection; other GND are necessary connections. The USB transceiver of CH342 is designed according to the built-in design of USB2.0, and it is remended that no external resistor is in series with UD+ and UD- pins. 4. Pin definitions QFN24 ESSOP10 Pin Pin No. Pin No....