CXD101-106Q - CMOS Digital Delay Line

Datasheet Details

Part number	CXD101-106Q
Manufacturer	Unknown Manufacturer
File Size	15.75 KB
Description	CMOS Digital Delay Line
Datasheet	CXD101-106Q Datasheet

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CXD101-106Q(1/2) IL08D C-MOS DIGITAL DELAY LINE —TOP VIEW— 36 35 34 33 32 31 30 29 28 27 26 25 1 2 DIN0 DIN1 DIN2 DIN3 DIN4 DIN5 DIN6 DIN7 DIN8 DIN9 DIN10 DOT0 DOT1 DOT2 DOT3 DOT4 DOT5 DOT6 DOT7 DOT8 DOT9 DOT10 36 35 34 33 32 31 29 28 27 38 37 GND 3 GND 37 38 39 40 41 42 43 44 45 46 47 48 NC VDD NC NC VDD NC 24 23 22 21 20 19 18 17 16 15 14 13 4 5 7 8 9 10 47 48 11 24 25 DOP MODE OEN SDO 26 14 1 2 3 4 5 6 7 8 9 10 11 12 SCK SIN STB YC LTP DG1 DG2 DG3 SOUT 13 15 16 INPUT CLK DIN0 - DIN10 DOP MODE OEN ; ; ; ; ; ( TINT SCK SIN STB YC DG1-DG3 LTP CP2 INV OUTPUT DOT0 - DOT10 SDO SOUT TOT ; ; ; ; ; ; ; ; ; CLOCK DATA DO PULSE H : 14CK DELAY L : 5CK DELAY OUTPUT ENABLE L : DOT0-10 OUTPUT STATUS H : HIGH IMPEDANCE STATUS H : MPU COMMUNICATION MODE MPU SERIAL I/F CLOCK MPU SERIA