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GS88036AT-133 - 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs

Description

The GS88018/32/36AT is a 9,437,184-bit (8,388,608-bit for x32 version) high performance synchronous SRAM with a 2-bit burst address counter.

Features

  • FT pin for user-configurable flow through or pipeline operation.
  • Single Cycle Deselect (SCD) operation.
  • 2.5 V or 3.3 V +10%/.
  • 10% core power supply.
  • 2.5 V or 3.3 V I/O supply.
  • LBO pin for Linear or Interleaved Burst mode.
  • Internal input resistors on mode pins allow floating mode pins.
  • Default to Interleaved Pipeline mode.
  • Byte Write (BW) and/or Global Write (GW) operation.
  • Internal self-timed write cycle.

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Datasheet Details

Part number GS88036AT-133
Manufacturer Unknown Manufacturer
File Size 756.70 KB
Description 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
Datasheet download datasheet GS88036AT-133 Datasheet

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Other Datasheets by Unknown Manufacturer

Part Number Description
GS88036AT-133I 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
GS88036AT-150 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
GS88036AT-150I 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
GS88036AT-166 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
GS88036AT-166I 512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs

Full PDF Text Transcription

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GS88018/32/36AT-250/225/200/166/150/133 100-Pin TQFP Commercial Temp Industrial Temp Features • FT pin for user-configurable flow through or pipeline operation • Single Cycle Deselect (SCD) operation • 2.5 V or 3.3 V +10%/–10% core power supply • 2.5 V or 3.3 V I/O supply • LBO pin for Linear or Interleaved Burst mode • Internal input resistors on mode pins allow floating mode pins • Default to Interleaved Pipeline mode • Byte Write (BW) and/or Global Write (GW) operation • Internal self-timed write cycle • Automatic power-down for portable applications • JEDEC-standard 100-lead TQFP package Pipeline 3-1-1-1 3.3 V 2.5 V Flow Through 2-1-1-1 3.3 V 2.
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