IW4071B
TECHNICAL DATA
Quad 2-Input OR Gate
High-Voltage Silicon-Gate CMOS
The IW4071B OR gates provide the system designer wich direct emplementation of the positive-logic OR function.
- Operating Voltage Range: 3.0 to 18 V
- Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 n A at 18 V and 25°C
- Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply
ORDERING INFORMATION IW4071BN Plastic IW4071BD SOIC TA = -55° to 125° C for all packages
LOGIC DIAGRAM PIN ASSIGNMENT
FUNCTION TABLE
Inputs PIN 14 =VCC PIN 7 = GND A L L H H B L H L H Output Y L H H H
MAXIMUM RATINGS-
Symbol VCC VIN VOUT IIN PD PD Tstg TL
- Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage...
