Description
10 3.3 Physical Address Space Map11 3.4 Static Memory Interface 13
3.4.1 Register Description 14 3.4.2 Example of Connection 19 3.4.3 Basic Interface 21 3.4.4 Byte Control 25 3.4.5 Burst ROM Interface 28 3.5 NAND Flash Interface 29 3.5.1 Register Description 29 3.5.2 NAND Flash Boot Loader 36 3.5.3 NAND Flash Operation 37 3.6 SDRAM Interface 41 3.6.1 Register Description 42 3.6.2 Refresh Time Constant Register (RTCOR) 49 3.6.3 Example of Connection 51 3.6.4 Address Multiplexing 53 3.6.5
Features
- 3
1.2.1 CPU core 3 1.2.2 Multimedia support 3 1.2.3 Memory sub-system 3 1.2.4 Clock generation and power management 4 1.2.5 On-chip peripherals 4 1.3 Characteristic 6
2 CPU Core 7
3 External Memory Controller 9
3.1 Overview 9 3.2 Pin.
JZ4725 Datasheet
