L29S800F Description
The L29S800F/-B are offered in a 48-pin TSOP(I) package, These devices are designed to be programmed in-system with the standard system 3.0 V VCC supply. 12.0 V VPP and 5.0 V VCC are not required for write or erase operations. The devices can also be reprogrammed in standard EPROM programmers.
L29S800F Key Features
- Single 3.0 V read, program, and erase Minimizes system level power requirements
- patible with JEDEC-standard mands 2 Uses same software mands as E PROMs
- patible with JEDEC-standard world-wide pinouts 48-pin TSOP(I)
- Minimum 100,000 program/erase cycles
- High performance 70 ns maximum access time
- Sector erase architecture One 8K word, two 4K words, one 16K word, and fifteen 32K words sectors in word mode One 16K by
- Boot Code Sector Architecture T = Top sector B = Bottom sector TM
- Embedded Erase Algorithms Automatically pre-programs and erases the chip or any sector TM
- Embedded Program Algorithms Automatically writes and verifies data at specified address
- Data Polling and Toggle Bit feature for detection of program or erase cycle pletion