M1010-01 Datasheet (VCSO BASED CLOCK JITTER ATTENUATOR)

Part: M1010-01
Manufacturer: Unknown Manufacturer
Size: 360.12 KB

M1010-01 Key Features

Ideal for OC-12/48 data clock
Integrated SAW delay line
Output frequencies from 150 to 175 MHz (Specify VCSO output frequency at time of order)
Low phase jitter of 0.5 ps rms, typical (12kHz to 20MHz)
LVPECL clock output
Pin-selectable feedback and reference divider ratios, no programming required
Scalable dividers provide further adjustment of loop bandwidth as well as jitter tolerance
Reference clock inputs support differential LVDS, LVPECL, as well as single-ended LVCMOS, LVTTL
Single 3.3V power supply
Small 9 x 9 mm SMT (surface mount) package

M1010-01 Description

The M1010-01 is a VCSO (Voltage Controlled SAW Oscillator) based clock jitter attenuator PLL designed for clock jitter attenuation and frequency translation. The device is ideal for generating the transmit reference clock for OC-12 and OC-48 optical network systems supporting 622 2,488 MHz rates. It can serve to jitter attenuate a stratum reference clock or a recovered clock in loop timing mode.