MTV212M64I Datasheet | Unknown Manufacturer

FEATURES - - - - - - - - - - - - - 8051 core, 12MHz operating frequency. 1024-byte RAM; 64K-byte program Flash-ROM support In System Programming(ISP). Maximum 14 channels of 5V open-drain PWM DAC. Maximum 32 bi-directional I/O pins. SYNC processor for posite separation/insertion, H/V polarity/frequency check, polarity adjustment and programmable clamp pulse output. Built-in self-test pattern generator with four free-running timings. Built-in low power reset circuit. pliant with VESA DDC1/2B/2Bi/2B+ standard. Dual slave IIC addresses. Single master IIC interface for internal device munication. 4-channel 6-bit ADC. Watchdog timer with programmable intervals. 40-pin DIP, 42-pin SDIP or 44-pin PLCC package. GENERAL DESCRIPTIONS The MTV212M64i micro-controller is an 8051 CPU core embedded device especially tailored to Monitor applications. It includes an 8051 CPU core, 1024-byte SRAM, SYNC processor, 14 built-in PWM DACs, VESA DDC interface, 4-channel A/D converter and a 64K-byte internal program Flash-ROM. BLOCK DIAGRAM P0.07 RD WR ALE INT1 P1.0-7 P2.0-2,P2.4-7 P3.2-0 P3.4-5 RST X1 X2 P0.07 RD WR ALE INT1 H/VSYNC CONTROL STOUT HBLANK VBLANK HSYNC VSYNC HCLAMP HALFV HALFH AD0-2 14 CHANNEL PWM DAC ISCL ISDA HSCL HSDA DDC & IIC INTERFACE This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of this product. No rights under any patent acpany the sale of the product. Revision 0.9 -1- 2000/11/16 MYSON TECHNOLOGY PIN CONNECTION (Rev 0.9) Note: As long as the pin sequence is not changed, the pin-out of 42 pin SDIP is negotiable according to customers’demand. DA2/P5.2 DA1/P5.1 DA0/P5.0 RST VDD VSS X2 X1 ISDA/P3.4/T0 ISCL/P3.5/T1 STOUT/P4.2 P2.2/AD2 P1.0 P1.1 P3.2/INT0 P1.2 P1.3 P1.4 P1.5 P1.6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21...