NT512D64S8HB0G Overview
NT512D64S8HB1GY and NT256D64SH88B1GY are packaged using lead free technology. NT512D72S8PB0G has ECC and is organized as dual ranks using eighteen 32Mx8 TSOP devices. NT256D72S89B0G has ECC and is organized as single rank using nine 32Mx8 TSOP devices.
NT512D64S8HB0G Key Features
- 184 Dual In-Line Memory Module (DIMM)
- Unbuffered DDR DIMM based on 256M bit die B device, organized as either 32Mbx8 or 16Mbx16
- DRAM DLL aligns DQ and DQS transitions with clock transitions
- Address and control signals are fully synchronous to positive clock edge
- Programmable Operation
- DIMM CAS Latency: 2, 2.5, 3
- Burst Type: Sequential or Interleave
- Burst Length: 2, 4, 8
- Operation: Burst Read and Write
- Auto Refresh (CBR) and Self Refresh Modes