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NVM3060 - 4096-Bit EEPROM

General Description

Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics Functional Description Memory Operation Testing Protected Matrix Shipment Test Functions Block Programming Read Reference Shifting Charge Pump Disable Description of the IM Bus 2 NVM

Key Features

  • is 255 for step a). The device will now internally time its programming sequence. During this ”busy” time all inputs are blocked from affecting the programming except for the Reset input. A Reset = L signal will immediately cancel any programming operation as well as any bus operation in progress. The busy state may be interrogated by reading bit 1 of address loc.

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Datasheet Details

Part number NVM3060
Manufacturer Unknown Manufacturer
File Size 577.19 KB
Description 4096-Bit EEPROM
Datasheet download datasheet NVM3060 Datasheet

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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NVM 3060 4096-Bit EEPROM Edition Feb. 14, 1990 6251-309-2/E ITT Semiconductors NVM 3060 Contents Page 3 4 4 4 4 5 5 5 5 7 8 8 8 8 8 9 9 9 9 10 Section 1. 2. 2.1. 2.2. 2.3. 2.4. 2.5. 2.5.1. 2.5.2. 2.5.3. 3. 3.1. 3.2. 3.3. 3.4. 4. 4.1. 4.2. 4.3. 5. Title Introduction Specifications Outline Dimensions Pin Connections Pin Descriptions Pin Circuits Electrical Characteristics Absolute Maximum Ratings Recommended Operating Conditions Characteristics Functional Description Memory Operation Testing Protected Matrix Shipment Test Functions Block Programming Read Reference Shifting Charge Pump Disable Description of the IM Bus 2 NVM 3060 4096-Bit EEPROM 1.