PLL500-17 - Low Phase Noise VCXO (17MHz to 36MHz)

Product Overview

Datasheet Details

Part number	PLL500-17
Manufacturer	ETC
File Size	215.35 KB
Description	Low Phase Noise VCXO (17MHz to 36MHz)
Datasheet	PLL500-17 Datasheet
Additional preview pages of the PLL500-17 datasheet.

PLL500-17 Product details

Description

The PLL500-17 is a low cost, high performance and low phase noise VCXO for the 17 to 36MHz range, providing less than -130dBc at 10kHz offset at 35.328MHz.

The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources.

Features

VCXO output for the 17MHz to 36MHz range Low phase noise (-130 dBc @ 10kHz offset at 35.328MHz). CMOS output with OE tri-state control. 17 to 36MHz fundamental crystal input. Integrated high linearity variable capacitors. 12mA drive capability at TTL output. +/- 150 ppm pull range, max 5% linearity. Low jitter (RMS): 2.5ps period jitter. 2.5 to 3.3V operation. Available in 8-Pin SOIC, 6-pin SOT23.

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Other Datasheets by ETC

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Published: Jul 25, 2005 |