QL4016-1PF144I Datasheet | Unknown Manufacturer

QL4016 Quick RAM Data Sheet - - - - - - 16,000 Usable PLD Gate Quick RAM ESP bining Performance, Density and Embedded RAM Device Highlights High Performance & High Density - 16,000 Usable PLD Gates with 118 I/Os - 300 MHz 16-bit Counters, 400 MHz Advanced I/O Capabilities - Interfaces with both 3.3 V and 5.0 V devices - PCI pliant with 3.3 V and 5.0 V busses Datapaths, 160+ MHz FIFOs - 0.35 µm four-layer metal non-volatile CMOS process for smallest die sizes for -1/-2/-3/-4 speed grades - Full JTAG boundary scan - I/O Cells with individually controlled Registered Input Path and Output Enables High Speed Embedded SRAM - 10 dual-port RAM modules, organized in user-configurable 1,152 bit blocks - 5 ns access times, each port independently accessible - Fast and efficient for FIFO, RAM, and ROM functions 10 RAM Blocks 320 High Speed Logic Cells Easy to Use / Fast Development Cycles - 100% routable with 100% utilization and Interface plete pin-out stability - Variable-grain logic cells provide high performance and 100% utilization - prehensive design tools include high quality Verilog/VHDL synthesis Figure 1: Quick RAM Block Diagram © 2002 Quick Logic Corporation .quicklogic....