SYM53CF92A-64QFP Overview
SYM53CF92A-64QFP (2/3) INPUT A0, A1 A2 - DBRD A3 - ALE CLK CS DACK DBWR MODE RD RESET TESTIN WR OUTPUT DREQ ; ADDRESS ADDRESS/READ SIGNAL FOR THE DMA DATA BUS ADDRESS CLOCK CHIP SELECT DMA ACKNOWLEDGE DMA WRITE SIGNAL MODE SELECT (PAD BUS/ADDRESS CONTROL BUS) REGISTER READ SIGNAL CHIP RESET TEST REGISTER WRITE SIGNAL INT ; OPEN-DRAIN INTERRUPT SIGNAL INPUT/OUTPUT.